;
; Copyright (c) Microsoft Corporation.  All rights reserved.
;
;
; Use of this sample source code is subject to the terms of the Microsoft
; license agreement under which you licensed this sample source code. If
; you did not accept the terms of the license agreement, you are not
; authorized to use this sample source code. For the terms of the license,
; please see the license agreement between you and Microsoft or, if applicable,
; see the LICENSE.RTF on your install media or the root of your tools installation.
; THE SAMPLE SOURCE CODE IS PROVIDED "AS IS", WITH NO WARRANTIES OR INDEMNITIES.
;

    INCLUDE kxarm.h
    INCLUDE monahans.inc
    INCLUDE littleton.inc
    INCLUDE image_cfg.inc
    
    INCLUDE monahans_macros.inc

    INCLUDE xlli_Littleton_defs.inc
   
    INCLUDE xlli_Monahans_defs.inc
    
    TEXTAREA

    IMPORT	main
    IMPORT OALVAtoPA
    IMPORT OALPAtoVA
    IMPORT XScaleFlushICache
    IMPORT XScaleFlushDCache
    
    ; XLLI/XLLP imports
    IMPORT xlli_GPIO_init
    IMPORT xlli_Dmem_initP1
    IMPORT xlli_Dmem_initP2
    IMPORT xlli_MFPR_init
    IMPORT xlli_Smem_init
    IMPORT xlli_set_clocks

    ; Included within the text section in order that a relative offset can be
    ; computed in the code below.
    ;
    INCLUDE oemaddrtab_cfg.inc

;-------------------------------------------------------------------------------
;
; OALStartUp: OEM bootloader startup code.  This routine will:
;
; * Copy the image to RAM if it's not already running there.
;
; * Set up the MMU and Dcache for the bootloader.
;
; * Initialize the first-level page table based up the contents
;   of the MemoryMap array and enable the MMU and caches.
;
; Inputs: None.
; 
; On return: N/A.
;
; Register used:
;
;-------------------------------------------------------------------------------
;
    ALIGN
    
    LEAF_ENTRY OALStartUp

    ldr sp, =IMAGE_BOOT_STACK_RAM_PA_START	  ;  needs rework for xip.  Also, is plat-specific so needs to be addressed.
     
    ;   Set up the Platform GPIOs
    ;
    bl      xlli_GPIO_init          ; Init the GPIO pins for use
    ldr     r0,     =xlli_MFPR_PHYSICAL_BASE; MFPR base address	; paramterize this for use in phy and virtual
    bl      xlli_MFPR_init          ; Init the MFPRs (Multi Function Pin Registers)

    ;
    ; DMEMC init, voltage change have been moved to MOBM. 
    ;
   ;
    ; hardcode MFPR for the ffuart
    ;
    ldr     r0, =xlli_MFPR_PHYSICAL_BASE
    ;ldr     r1, =0x0000A042		; 
    ;ldr     r1, =0x000000C2		;  power mod
    ;str	  r1, [r0, #0x438]	; gpio 41

    ldr	r1, =0xA041
    str	r1, [r0, #0x062C]   ; gpio 110, STRXD
    
    ;ldr	  r1, =0x0000A042		;
    ;ldr	  r1, =0x000000C2		;  power mod: txd
    ;str	  r1, [r0, #0x43C]	; gpio 42
    ldr	r1, =0xC041
    str	r1, [r0, #0x0628]	; gpio 109, STTXD
    

    ;
    ; Initialize the FFUART for debug messages.  Assumes xlli_GPIO_Init and xlli_MFPR_init have already run and
    ;	configured the pins for at least ffuart txd/rxd.
    ;
    ldr		r0, =MONAHANS_BASE_REG_PA_SIRUART
    InitFFUART r0, r1, r2

    ; sign on string
    add		 r1, pc, #SIGNON-(.+8)
    PrintStr r0, r1, r2	; FBA, *str, gp

    add         r1, pc, #BOOTFREQ-(.+8)
    PrintStr r0, r1, r2	; FBA, *str, gp
    
    ldr         r0, =xlli_CLKREGS_PHYSICAL_BASE
    ldr         r1, [r0, #xlli_ACSR_offset]
    ldr		 r0, =MONAHANS_BASE_REG_PA_SIRUART
    PrintReg    r0, r1, r2,r3,r4
    
    
    ; Make sure sleep-mediated reset flag is cleared (won't be set if we're here 
    ; because of a POR, hardware, or watchdog reset.
    ;
    ;ldr     r1, =xlli_RCSR_SMR
    ;bic     r10, r10, r1

    ;
    ;Intialize Static Memory Controller for Ethernet.
    ;
    ldr r0, =xlli_STAMREGS_PHYSICAL_BASE
    bl xlli_Smem_init

    ;
    ; Override a few settings in xlli_Smem_init.
    ;   1) MSC1
    ;   2) CSADRCFG[3]
    ;   3) CSADRCFG[2]
    ;
    ldr r0, =xlli_STAMREGS_PHYSICAL_BASE
    ldr r1, =0x7FFC7FF8
    str r1, [r0, #xlli_MSC1_offset]
    ldr r1, [r0, #xlli_MSC1_offset]
    
    ldr r1, =0x003E080B         ; what we have been using.  need to investigate xlli values better.
    str r1, [r0, #xlli_CSADRCFG3_offset]
    ldr r1, [r0, #xlli_CSADRCFG3_offset]
    
    ldr r1, =0x00320919         ; What monahans.xdb also uses.
    str r1, [r0, #xlli_CSADRCFG2_offset]
    ldr r1, [r0, #xlli_CSADRCFG2_offset]

	; Print out the number 
	ldr     r4, =0x40100000                 
    mov		r12, #0x34
	strb	r12, [r4, #0]

	; Print out the number 
	ldr     r4, =0x40100000                 
    mov		r12, #0x35
	strb	r12, [r4, #0]

    ; Jump to the C entrypoint.
    ;
    bl      main                              ; Jump to main.c::main(), never to return...

    
STALL2
    b      STALL2 

	ALIGN
SIGNON	DCB	0xA, 0xD, "IPL Alive", 0xA, 0xD, 0
	
         ALIGN
BOOTFREQ	DCB	0xA, 0xD, "ACSR = ", 0xA, 0xD, 0



    END

    
